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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4002 Dual 4-input NOR gate Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Dual 4-input NOR gate FEATURES * Output capability: standard * ICC category: SSI GENERAL DESCRIPTION 74HC/HCT4002 The 74HC/HCT4002 are high-speed Si-gate CMOS devices and are pin compatible with "4002" of the "4000B" series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4002 provide the 4-input NOR function. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". PARAMETER propagation delay nA, nB, nC, nD to nY input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 9 3.5 16 HCT 11 3.5 22 ns pF pF UNIT December 1990 2 Philips Semiconductors Product specification Dual 4-input NOR gate PIN DESCRIPTION PIN NO. 1, 13 2, 9 3, 10 4, 11 5, 12 6, 8 7 14 SYMBOL 1Y, 2Y 1A, 2A 1B, 2B 1C, 2C 1D, 2D n.c. GND VCC NAME AND FUNCTION data outputs data inputs data inputs data inputs data inputs not connected ground (0 V) positive supply voltage 74HC/HCT4002 Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 1990 3 Philips Semiconductors Product specification Dual 4-input NOR gate FUNCTION TABLE INPUTS nA L H X X X Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care nB L X H X X nC L X X H X 74HC/HCT4002 OUTPUT nD L X X X H nY H L L L L Fig.4 Functional diagram. Fig.5 Logic diagram 74HC4002 (one gate). Fig.6 Logic diagram 74HCT4002 (one gate). December 1990 4 Philips Semiconductors Product specification Dual 4-input NOR gate DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Out put capability: standard ICC category: SSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER min. tPHL/ tPLH propagation delay nA, nB, nC, nD to nY output transition time +25 typ. 30 11 9 19 7 6 -40 to +85 max. min. 100 20 17 75 15 13 max. 125 25 21 95 19 16 -40 to +125 min. max. 150 30 26 110 22 19 ns 74HC/HCT4002 TEST CONDITIONS UNIT VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 Fig.7 tTHL/ tTLH ns Fig.7 December 1990 5 Philips Semiconductors Product specification Dual 4-input NOR gate DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: SSI Note to HCT types 74HC/HCT4002 The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT nA, nB, nC, nD UNIT LOAD COEFFICIENT 0.45 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER min. tPHL/ tPLH tTHL/ tTLH propagation delay nA, nB, nC, nD to nY output transition time +25 typ. 13 7 -40 to +85 max. min. 22 15 max. 28 19 -40 to +125 min. max. 33 22 ns ns 4.5 4.5 Fig.7 Fig.7 UNIT V CC (V) WAVEFORMS TEST CONDITIONS AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the input (nA, nB, nC, nD) to output (nY) propagation delays and the output transition times. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 6 |
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